Skip to Main content Skip to Navigation

Search by documents

hal-01091138v1  Conference papers
Florent de DinechinMatei Istoan. Hardware implementations of fixed-point Atan2
22nd IEEE Symposium on Computer Arithmetic, Jun 2015, Lyon, France
hal-01561052v3  Journal articles
Anastasia VolkovaMatei IstoanFlorent de DinechinThibault Hilaire. Towards Hardware IIR Filters Computing Just Right: Direct Form I Case Study
IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, In press, ⟨10.1109/TC.2018.2879432⟩
hal-03220258v1  Conference papers
Florent de DinechinSilviu-Ioan FilipMartin KummAnastasia Volkova. Towards Arithmetic-Centered Filter Design
ARITH 2021 - 28th IEEE Symposium on Computer Arithmetic, Jun 2021, Torino, Italy. pp.1-4
hal-03220290v1  Conference papers
Andreas BöttcherMartin KummFlorent de Dinechin. Resource Optimal Truncated Multipliers for FPGAs
ARITH 2021 - 28th IEEE International Symposium on Computer Arithmetic, Jun 2021, Torino, Italy. pp.1-8
tel-02420901v2  Theses
Yohann Uguen. High-level synthesis and arithmetic optimizations
Mechanics []. Université de Lyon, 2019. English. ⟨NNT : 2019LYSEI099⟩
tel-03102749v1  Theses
Andrea Bocco. A variable precision hardware acceleration for scientific computing
Discrete Mathematics [cs.DM]. Université de Lyon, 2020. English. ⟨NNT : 2020LYSEI065⟩