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Communication Dans Un Congrès Année : 2005

A New Embedded Measurement Structure for eDRAM Capacitor

Résumé

The embedded DRAM (eDRAM) is more and more used in System On Chip (SOC). The integration of the DRAM capacitor process into a logic process is challenging to get satisfactory yields. The specific process of DRAM capacitor and the low capacitance value (~30F) of this device induce problems of process monitoring and failure analysis. We propose a new test structure to measure the capacitance value of each DRAM cell capacitor in a DRAM array. This concept has been validated by simulation on a 0.18µm eDRAM technology.
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Dates et versions

hal-00181649 , version 1 (24-10-2007)

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L. Lopez, Jean-Michel Portal, D. Nee. A New Embedded Measurement Structure for eDRAM Capacitor. DATE'05, Mar 2005, Munich, Germany. pp.462-463. ⟨hal-00181649⟩
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