Table of Contents
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VLSI-SoC: At the Crossroads of Emerging Trends
Alex Orailoglu, H. Fatih Ugurdag, Luís Miguel Silveira, Martin Margala, Ricardo Reis (Eds.)
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Front Matter |
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Debugging Methods Through Identification of Appropriate Functions for Internal Gates
Kosuke Oshima, Takeshi Matsumoto, Masahiro Fujita |
1-22 |
Gate Sizing Under Uncertainty
Nathaniel Conos, Saro Meguerdichian, Miodrag Potkonjak |
23-47 |
New Scan-Based Attack Using Only the Test Mode and an Input Corruption Countermeasure
Sk Ali, Samah Saeed, Ozgur Sinanoglu, Ramesh Karri |
48-68 |
Quantitative Optimization and Early Cost Estimation of Low-Power Hierarchical-Architecture SRAMs Based on Accurate Cost Models
Yuan Ren, Tobias Noll |
69-93 |
Low-Power Low-Voltage ΔΣ Modulator Using Switched-Capacitor Passive Filters
Ali Yeknami, Atila Alvandpour |
94-118 |
Fine Grain Precision Scaling for Datapath Approximations in Digital Signal Processing Systems
Seogoo Lee, Andreas Gerstlauer |
119-143 |
A Complete Real-Time Feature Extraction and Matching System Based on Semantic Kernels Binarized
Michael Schaffner, P. Hager, L. Cavigelli, Z. Fang, P. Greisen, F. Gürkaynak, A. Smolic, H. Kaeslin, L. Benini |
144-167 |
An FPGA-Based Real-Time System for 3D Stereo Matching, Combining Absolute Differences and Census with Aggregation and Belief Propagation
Kyprianos Papadimitriou, Sotiris Thomas, Apostolos Dollas |
168-187 |
Minimizing Test Frequencies for Linear Analog Circuits: New Models and Efficient Solution Methods
Mohand Bentobache, Ahcène Bounceur, Reinhardt Euler, Salvador Mir, Yann Kieffer |
188-207 |
Partition-Based Faults Diagnosis of a VLIW Processor
Davide Sabena, Matteo Reorda, Luca Sterpone |
208-226 |
Enhanced Compressed Look-up-Table Based Real-Time Rectification Hardware
Abdulkadir Akin, Luis Gaemperle, Halima Najibi, Alexandre Schmid, Yusuf Leblebici |
227-248 |
A Flexible ASIC for Time-Domain Decision-Directed Channel Estimation in MIMO-OFDM Systems
Andreas Minwegen, Dominik Auras, Gerd Ascheid |
249-265 |
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