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A defect-tolerant area-efficient multiplexer for basic blocks in SRAM-based FPGAs

Arwa Ben Dhia 1, 2 Samuel Nascimento Pagliarini 1, 2 Lirida Alves de Barros Naviner 1, 2 Habib Mehrez 3 Philippe Matherat 1, 2
1 SSH - Secure and Safe Hardware
LTCI - Laboratoire Traitement et Communication de l'Information
2 COMELEC - Département Communications & Electronique
3 LTCI - Laboratoire Traitement et Communication de l'Information
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https://hal-imt.archives-ouvertes.fr/hal-01062075
Contributor : Admin Télécom Paristech <>
Submitted on : Tuesday, September 9, 2014 - 10:48:30 AM
Last modification on : Thursday, March 5, 2020 - 3:53:32 PM

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  • HAL Id : hal-01062075, version 1

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INSTITUT-TELECOM | CNRS | PARISTECH | LTCI | SSH | COMELEC

Citation

Arwa Ben Dhia, Samuel Nascimento Pagliarini, Lirida Alves de Barros Naviner, Habib Mehrez, Philippe Matherat. A defect-tolerant area-efficient multiplexer for basic blocks in SRAM-based FPGAs. European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Oct 2013, Arcachon, France. pp.1189-1193. ⟨hal-01062075⟩

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