A Novel Analytical Method for Defect Tolerance Assessment

Abstract :

Due to technology downscaling, defect tolerance analysis has become a major concern in the design of digital circuits. In this paper, we present a novel analytical method that calculates the defect tolerance of logic circuits using probabilistic defect propagation. The proposed method is explained in case of single defect model, but can be easily adapted to handle multiple fault scenarios. The approach manages signal dependencies due to reconvergent fanouts and provides accurate results while keeping linear complexity.

Type de document :
Article dans une revue
Microelectronics Reliability, Elsevier, 2015, 55, pp.1285-1289
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Soumis le : vendredi 16 octobre 2015 - 18:08:17
Dernière modification le : jeudi 11 janvier 2018 - 06:23:39

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  • HAL Id : hal-01216729, version 1

Citation

Mariem Slimani, Arwa Ben Dhia, Lirida Alves de Barros Naviner. A Novel Analytical Method for Defect Tolerance Assessment. Microelectronics Reliability, Elsevier, 2015, 55, pp.1285-1289. 〈hal-01216729〉

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