All-Digital Calibration of Timing Skews for TIADCs Using The Polyphase Decomposition

Han Le Duc 1, 2 D. M. Nguyen Chadi Jabbour 1, 2 Tarik Graba 3, 2 Patricia Desgreys 1, 2 Olivier Jamin 4, 1, 2 V. T. Nguyen 1, 2
1 C2S - Circuits et Systèmes de Communication
LTCI - Laboratoire Traitement et Communication de l'Information
3 SSH - Secure and Safe Hardware
LTCI - Laboratoire Traitement et Communication de l'Information
Abstract :

This brief proposes a new all-digital calibration technique suppressing the timing mismatch effect in time-interleaved analog-to-digital converters (TIADCs) for input at any Nyquist band (NB) using the equivalent polyphase structure of the TIADC. The correction technique is simple and does not require the adaptive digital synthesis filters. The timing mismatch is estimated based on an adaptive stochastic gradient descent technique, which is a promising solution for TIADCs operating at a very fast sampling rate. The digital circuit of the proposed calibration algorithm is designed and synthesized using a 28-nm fully depleted Silicon on insulator (FD-SOI) CMOS technology for the 11-b 60-dB SNR TIADC clocked at 2.7 GHz with the input in the first four NBs. The designed circuit occupies the area of 0.05 mm2 and dissipates the total power of 41 mW.

Document type :
Journal articles
Complete list of metadatas

https://hal-imt.archives-ouvertes.fr/hal-01271601
Contributor : Admin Télécom Paristech <>
Submitted on : Tuesday, February 9, 2016 - 1:55:57 PM
Last modification on : Thursday, October 17, 2019 - 12:37:03 PM

Identifiers

  • HAL Id : hal-01271601, version 1

Citation

Han Le Duc, D. M. Nguyen, Chadi Jabbour, Tarik Graba, Patricia Desgreys, et al.. All-Digital Calibration of Timing Skews for TIADCs Using The Polyphase Decomposition. IEEE Transactions on Circuits and Systems II, 2016, 63 (1), pp.99-103. ⟨hal-01271601⟩

Share

Metrics

Record views

145