All-Digital Calibration of Timing Skews for TIADCs Using The Polyphase Decomposition

Abstract :

This brief proposes a new all-digital calibration technique suppressing the timing mismatch effect in time-interleaved analog-to-digital converters (TIADCs) for input at any Nyquist band (NB) using the equivalent polyphase structure of the TIADC. The correction technique is simple and does not require the adaptive digital synthesis filters. The timing mismatch is estimated based on an adaptive stochastic gradient descent technique, which is a promising solution for TIADCs operating at a very fast sampling rate. The digital circuit of the proposed calibration algorithm is designed and synthesized using a 28-nm fully depleted Silicon on insulator (FD-SOI) CMOS technology for the 11-b 60-dB SNR TIADC clocked at 2.7 GHz with the input in the first four NBs. The designed circuit occupies the area of 0.05 mm2 and dissipates the total power of 41 mW.

Type de document :
Article dans une revue
IEEE Transactions on Circuits and Systems II, 2016, 63 (1), pp.99-103
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Soumis le : mardi 9 février 2016 - 13:55:57
Dernière modification le : jeudi 11 janvier 2018 - 06:23:39

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  • HAL Id : hal-01271601, version 1

Citation

Han Le Duc, D. M. Nguyen, C. Jabbour, Tarik Graba, P. Desgreys, et al.. All-Digital Calibration of Timing Skews for TIADCs Using The Polyphase Decomposition. IEEE Transactions on Circuits and Systems II, 2016, 63 (1), pp.99-103. 〈hal-01271601〉

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