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Conference papers

FFT Radix-2 and Radix-4 FPGA Acceleration Techniques Using HLS and HDL for Digital Communication Systems

Ghattas Akkad 1 Ali Mansour 1 Elhassan Boudaia Frédéric Le Roy 2 Mohamad Najem 3
1 Lab-STICC_ENSTAB_CACS_COM
Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
3 Lab-STICC_ENSTAB_ CACS_MOCS
Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
Abstract : Fast Fourier Transform (FFT) is generally implemented on reconfigurable hardware in several signal processing or digital communication applications. It can be considered the most time and resource consuming operations due to the need of complex operations. The main of this manuscript is to investigate the contribution of High Level Synthesis (HLS) techniques on the implementation of real time FFT algorithms using field programmable gate arrays (FPGAs). In particular, this study focuses on communication systems incorporating filter-based-multicarrier modulations (FBMC), a promising candidate for the 5G technology. In order to evaluate the contribution of HLS, we implemented and tested various combinations such as: 8 and 16 points radix-2 and radix-4 FFT using finite precision, HLS tools and HDL while prompting parallelization, pipelining and hardware reuse architectures.
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Conference papers
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https://hal-ensta-bretagne.archives-ouvertes.fr/hal-01936699
Contributor : Marie Briec <>
Submitted on : Tuesday, November 27, 2018 - 3:27:05 PM
Last modification on : Wednesday, April 21, 2021 - 11:18:02 AM

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  • HAL Id : hal-01936699, version 1

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Ghattas Akkad, Ali Mansour, Elhassan Boudaia, Frédéric Le Roy, Mohamad Najem. FFT Radix-2 and Radix-4 FPGA Acceleration Techniques Using HLS and HDL for Digital Communication Systems. IEEE International Multidisciplinary Conference on Engineering Technology, (IMCET 2018), Nov 2018, Beirut, Lebanon. ⟨hal-01936699⟩

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