A defect-tolerant area-efficient multiplexer for basic blocks in SRAM-based FPGAs

Arwa Ben Dhia 1, 2 Samuel Nascimento Pagliarini 1, 2 Lirida Alves de Barros Naviner 1, 2 Habib Mehrez 3 Philippe Matherat 1, 2
1 SSH - Secure and Safe Hardware
LTCI - Laboratoire Traitement et Communication de l'Information
2 COMELEC - Département Communications & Electronique
3 LTCI - Laboratoire Traitement et Communication de l'Information
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Journal articles
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https://hal-imt.archives-ouvertes.fr/hal-01062109
Contributor : Admin Télécom Paristech <>
Submitted on : Tuesday, September 9, 2014 - 11:18:14 AM
Last modification on : Thursday, October 17, 2019 - 12:37:03 PM

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  • HAL Id : hal-01062109, version 1

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INSTITUT-TELECOM | CNRS | PARISTECH | LTCI | SSH | COMELEC

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Arwa Ben Dhia, Samuel Nascimento Pagliarini, Lirida Alves de Barros Naviner, Habib Mehrez, Philippe Matherat. A defect-tolerant area-efficient multiplexer for basic blocks in SRAM-based FPGAs. Microelectronics Reliability, 2013, pp.1189-1193. ⟨hal-01062109⟩

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